The present invention relates to loadable ripple counters.
Counters count sequential input pulses, providing a parallel output indicating the counted value. Ripple counters routinely employ flip-flops configured to alternate their outputs upon each clock pulse. An N-bit ripple counter employs N flip-flops connected in a chain so that each flip-flop output both clocks the next flip-flop and is used as a bit of the N-bit parallel output of the counter. A ripple counter having this configuration is described in Millman, Microelectronics, (McGraw Hill 1979), pp. 220-222.
Loadable N-bit ripple counters are configured to be loaded with an N-bit parallel input so that counting begins at the loaded number. An example of a common prior art loadable ripple counter is shown in FIG. 1 and described in detail below.